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Electrochemical deposition processes for 2.5D/3D interconnects developed at NANO3D SYSTEMS LLC offer superior performance and substantially lower cost compared to conventional processes. NANO3D’s processes are based on novel electrochemical nano-materials such as plating solutions with self-assembled suppression-based organic additives to achieve void-free bottom up gap fill and conformal electroless nickel (cobalt) alloys barrier & copper seed layers. These plating solutions enable high speed copper (> 4 μm/min) plating of bumps, pillars and redistribution layers as well as defect-free fill of high aspect ratios (>20) through-substrate vias (TSuVs) with Cu or other metals. Our electrochemical deposition techniques have no limitations on chip design rules and can be applied to all types of 2.5D/3D applications from logic and memory to MEMS, wireless and power electronics. NANO3D’s electrochemical TSuV metallization is fully compatible with all process steps in various 3D TSuV manufacturing schemes currently under evaluation and can be easily incorporated into any finally standardized “process flow of reference”. This low cost electrochemical TSuV technology addresses the major threats for adoption of 2.5D/3D TSuV including scalability to high aspect ratio and high cost. Another threat for adoption of 2.5D/3D TSuV technology, that is related to power density limitation and thermal dissipation from thinned dies, is expected to be solved by using controlled expansion metal alloys (NANO3D’s electroplated INVAR).

Advanced chip (2.5D/3D) packaging is driven by smart phones (43% of wafer starts) and tablets (13% WS). Advanced packaging is a frenetic market with a growing number of new options. Several advanced packaging types are in the market, such as 2.5D/3D and fan-out. Both types are moving toward more functions and I/Os, supporting larger and more complex dies. In one example of fan-out, a DRAM die is stacked on a logic chip in a package. This brings the memory closer to the logic, enabling more bandwidth. Fan-out packages consist of dies and redistribution layers (RDLs). RDLs are the copper metal interconnects that electrically connect one part of the package to another. Besides 2.5D and fan-out, advanced chip packaging options include 3D-ICs, chipsets, multi-chip modules (MCMs) and system-in-package (SiP). In advanced chip packages, the dies are stacked and connected using copper TSuVs, microbumps and pillars. Copper bumps/pillars/RDLs/TSuVs provide small, fast electrical connections between different devices.

NANO3D’s electrochemical technology enables fine pitches, high aspect ratios, better reliability and lower cost 2.5D/3D interconnects including copper and INVAR TSuVs, bumps, pillars, RDLs et al. Val Dubin, Founder and President of NANO3D SYSTEMS LLC, will make a presentation titled “Electrochemical Deposition of 3D Interconnects” at PRiME 2020 meeting on October 8, 2020 where he will discuss NANO3D’s electrochemical deposition technology for advanced chip packaging.


The coronavirus will leave an enormous impact on how we consume, learn, work, socialize and communicate. This pandemic has also shown us how important PPE (personal protection equipment) is in fighting the deadly contagious diseases such COVID-19. Wearing a protective facemask, especially for medical professionals who are in the forefront of the fight against the COVID-19, truly becomes a matter of life and death.

NANO3D has invented and filed a patent application for Antiviral and Antibacterial Covering. NANO3D’s patent pending antiviral and/or antibacterial covering contains metals such as silver, copper, and gold infused within various fabric blends such as nylon, polyester, and cotton. One of the embodiments of this invention is related to the use of copper conductive fabric in a sandwich of fabrics to make a facemask. The wearers of such facemasks can enjoy not only filtration protection from particulates (i.e., pathogens, allergens, dust, smoke, pollution et al), but also they will have profound antimicrobial and antiviral protection.

Copper surfaces have intrinsic properties to destroy a wide range of microorganisms including bacteria and viruses:
• The first recorded medical use of copper is from one of the oldest-known books, the Smith Papyrus, written between 2600 and 2200 B.C. It stated that copper was used to sterilize chest wounds and drinking water. Egyptian and Babylonian soldiers would similarly put the shavings from their bronze swords into their open wounds to reduce infections. Also hundreds of employees who worked in a copper smelter in Paris had all been spared from cholera outbreaks that hit the city in 1832, 1849, and 18521.
• Inactivation of influenza A Virus was studied on copper versus stainless steel surfaces. After incubation for 24 h on stainless steel, 500,000 virus particles were still infectious while after incubation for 6 h on copper, only 500 particles were active (citation:
• U.S. government-funded study conducted by researchers at the National Institutes of Health and the Centers for Disease Control and Prevention reporting that the SARS-CoV-2 virus, which causes the disease COVID-19, remained viable for up to 2 to 3 days on plastic and stainless steel surfaces vs. up to 4 hours on copper (citation:
• Copper alloy materials are registered by EPA (Reg. Nos. 82012-1 to 6) to make public health claims against six specific bacteria’s, e.g. continuously kills >99.9% of MRSA within 2 hours of contact between routine cleanings.
• Our bacterial survival data showed that no E.Coli bacteria survived after 1 hour incubation on the surface of copper fabric while large number of E.Coli bacteria survived after 4 hours incubation on Stainless Steel. In addition to copper, silver is also known for its antibacterial properties. For example, stretchy Ag fabrics are commonly used in wound dressing wraps. For more information on metallized fabrics, visit

The Third Prize at the Innovation and Entrepreneurship Competition

Val Dubin, founder and president of NANO3D SYSTEMS LLC, was awarded the third prize at the Innovation and Entrepreneurship Competition. The weeklong competition took place November 2019 in Hangzhou, Zhejiang province in China. There were a record number of entries for this prestigious competition with over 1600 applicants from various companies around the world, which has doubled from the previous year. Participants were required to have innovative technologies with strong market potential. Winning projects that successfully launch in Hangzhou within one year of the competition will be granted a maximum subsidy of 5 million yuan (over $711,000). They will also enjoy preferential taxes, subsidized housing, matching of funding and loan policies etc. Val Dubin presented, at the competition in Hangzhou, the project titled: “Atomic Layer & Electrochemical Deposition for 2.5D/3D Interconnects and Fine-Pitch Bumping”.


The participants of the competition were engaged in communication with various Innovation and entrepreneurial resources in Hangzhou and other cities in Zhejiang province. Those resources include venture capitalists, well-known enterprises, research institutions and various science & industrial parks. Hangzhou is a paradise-like city with a modern infrastructure, famous for its historical relics, natural scenery, the headquarters of the e-commerce giant Alibaba, and the venue of the 2016 G20 Summit. In order to meet the needs of Hangzhou’s rapid economic development, attract innovative talents and entrepreneurial projects, Hangzhou has established a number of high-tech parks, including international science parks for non-Chinese. To promote the development of high-tech industries, China is also implementing increasingly strict intellectual property protection laws and support for high-tech companies.


“We are very honored to have been awarded 3rd prize at the Grand Final of the Competition. The respective honor came despite stiff competition from companies around the world and we’re proud to have such prestigious distinction. Hangzhou science parks are the ideal place to establish NANO3D’s presence in China, scale up our electrochemical technology, plating materials as well as develop new products with atomic level control such as atomic layer deposition. NANO3D’s high density interconnect (HDI) technology enables higher scalability & density, controlled-expansion, low cost of 2.5D/3D interconnects and fine-pitch bumping in advanced chip packaging applications. China has dominant market share in consumption of HDI plating chemicals of over $2B per year and we are excited to service this market with NANO3D’s innovative technology & products”, said Val Dubin.

The Innovation & Entrepreneurship Competition for International Talents 2019 in Hangzhou, China

NANO3D SYSTEMS is pleased to be nominated as a semifinal competitor of The Innovation & Entrepreneurship Competition for International Talents 2019 in Hangzhou, China. We see this nomination as an opportunity for our eLOCOS(TM) plating technology to expand into the Chinese market and establish NANO3D’s presence in China. eLOCOS(TM) technology enables small form factor, affordable, reliable 2.5D/3D microsystems and fine-pitch bumps. It overcomes the key technical roadblocks in manufacturing of fine-pitch, large area, multi-layer, flexible printed circuit boards and high density interconnects for 2.5D interposers, 3D IC, power electronics et al.

As per the findings of a business intelligence report published by IndustryARC, Asia-Pacific occupied a dominating regional share of 40% in the global electroplating market. It was valued at $15B in 2018 and it is estimated to grow with a healthy compound annual growth rate (CAGR) of 4% during the forecast period 2019-2025. Through 2024, electronics will remain the largest end-use market, followed by the automotive sector. China accounts for 21% of advanced chip packaging revenue (~$30B) in Y2018 (Taiwan 52%, US – 15%). China is the #1 manufacturer of smart phones with ~38.8% market share. China is also the #1 manufacturer of automotive’s with ~28 millions annual car sales.

The semifinal competition and grand finals will be held in Hangzhou in November 2019. Hangzhou International Human Resources Exchanges and Cooperation Conference will be held concurrently. Through visits and match-making meetings, the teams have excellent opportunity to personally learn  about Hangzhou, witness the mix of nature beauty and modernization of Hangzhou, and see the ecosystem of various high-tech industry parks. Furthermore through this event, teams make friends all over the world and find potential business partners. In many instances, no matter whether winning the final or not, every team is a winner in this event! HERE is a video presentation for the 2018 Competition.



NANO3D SYSTEMS, LLC has successfully completed NSF SBIR Phase II/IIB project. Project Outcomes Report for award # 1456385 is available in To expand commercialization efforts of NSF SBIR related products such as plating solutions for High Speed (> 4 µm/min) Copper Deposition and Controlled-Expansion (CTE < 2 ppm) Nickel-Iron Alloy Interconnects et al. We have established marketing, distribution and sales in China through our distributors (Phentex Fine Chemicals and eChem360 with contact info at

NANO3D SYSTEMS, LLC also expands its product portfolio to Copper, Copper-Nickel, Stainless-Steel and Silver conductive fabrics with low surface resistance of < 0.05 Ohm/Sq and high shielding effectiveness having attenuation of >60 dB in 10 MHz to > 3 GHz frequency range. The coating processes, used to deposit metals in our fabrics (nylon, polyester, cotton and non-woven et al), deliver an impervious bond that can not be broken. The resulting bond delivers unparalleled durability even under conditions that require constant flexing, bending, stretching or abrading. No other metallized fabric is more durable and because of superior bonding technology, our conductive fabrics deliver proven, consistent and reliable electrical conductivity and electromagnetic reflectivity performance, even in the most challenging environments. The electrosmog or the electromagnetic (EM) radiation is considered as a major environmental pollutant and has been under debate for quite some time. For more information and to purchase our Conductive Fabrics Blocking EMF/RFID/EMI/RF Radiation visit our online store at and

Industry Trends

Advanced Packaging and Scaling

The shift to 5G wireless networks is driving a need for new IC packages and modules in smartphones and other systems. 5G devices will require an assortment of new technologies, such as phased-array antennas and antenna-in-package.

The path to 5nm is well-defined compared with 3nm. 5nm is still a finFET. We are entering a transition period from finFETs to other device architectures, such as nanosheet et al at N3. To extend the finFET to N3, we need a special technique to enhance the single fin power and/or reduce backend parasitics.

Wearables and Conductive Fabrics

Wearable electronics are emerging as a platform for next-generation, human-friendly, electronic devices. A new class of devices with various functionality and amenability for the human body is essential. These new conceptual devices are likely to be a set of various functional devices such as displays, sensors, batteries, etc., which have quite different working conditions, on or in the human body.

Conductive fabrics are an essential part of wearable electronics and devices. Metallization of fabrics is being driven by several applications that include but not limited to 1) smart fabrics and wearable technology, 2) military, 3) EMI/RFI shielding, 4) decorative, 5) cosmetics and glamour, 6) antibacterial and antimicrobial, 7) medical sensors such as sweating, monitoring heart rate, breathing etc., and 8) automotive, to name a few. Conductive textiles market is projected to reach $4.29 billion by 2025 with CAGR of 16.4% (Market Research Report from Grand View Research). Rising awareness about the high-tech wearables that can enable health monitoring, track the surrounding environment and provide protection from hazardous pollutants in the environment are the factors propelling market growth.


NANO3D SYSTEMS, LLC (NANO3D) formulates, markets and sells specialty chemicals for metal deposition including Electroplating (EP), Electroless Plating (ELP), Atomic Layer Deposition (ALD) and Chemical Vapor Deposition (CVD). Our products are used for research and development as well as commercial scale applications, especially in microelectronic, transportation and chemical industries. We also provide custom formulations of plating solutions, precursor synthesis, micro-fabrication and characterization services.

NANO3D launched the new webpage – Product Resources containing an interactive periodic table with information on properties, electrochemical deposition solutions and applications for 83 elements as well as information on electroplating and electroless plating processes. 38 metals & compounds can be deposited using electrochemical products available online at our STORE (EP Au, Cu, Cr, Ni, NiFe, NiCo, Pd, Sn, ELP AgW, Au, Cu, Sn, Zn, CuZn, CoWP, NiP, NiWP, CoWBP as well as plateable TiOx/Pd photoresist, EL Ni kits, Cu plated graphite & Si particles, CNT solutions, Ni & NiFe & Pd foils, reducing agents, plating additives et al). There are 10 metals including Ir, Pd, Pt, Ru, Rh, Au, Ag, Co, Ni, Cu that can be deposited using ALD & CVD precursors supplied by NANO3D in collaboration with our partner.


Advanced Packaging and Scaling

The electrochemical deposition (ECD) equipment and materials market for advanced IC packaging is heating up as 2.5D (silicon, organic and glass interposers), 3D (through-silicon vias, TSV) and fan-out (wafer-level and panel-level processes) technologies begin to ramp up. Heterogeneous multi-chip packaging and fan-out packaging processes enable semiconductor companies to achieve performance goals without just shrinking feature sizes.

Plating for advanced packaging includes Cu & SnAg & Ni pillars with down to 10-30 µm pitch and Cu redistribution layers (RDL) for flip chip technology as well as through-substrate via (hole) filling and Cu RDL’s for 2.5D interposers and 3D-ICs.

Plated mega-Cu pillars (~200 µm thick) and Cu RDL are used for fan-out packages. The latest high-density fan-out packages are migrating toward the 1 µm line/space and beyond. Redistribution layers with smaller critical dimensions enable reducing the total number of redistribution process levels in a fan-out package. At these critical dimensions (CDs), fan-outs will provide better performance and cost. Thickness uniformity, high plating speed with current densities in the range of 400 – 600 mA/cm2, and low stress of Cu electrodeposits are very important for advanced packaging.

Scaling continues to be a vibrant part of the IC business. TSMC is reporting that 25% of their revenue is coming from 7 nm, and 5 nm risk wafers with EUVL up to 14 layers and interconnect pitch of below 30 nm are starting this year or early next year. It’s unclear if copper can extend to 3nm, so the industry is exploring other metals such as cobalt et al. Intel moved from traditional Cu to Co materials for two of the interconnect layers at 10 nm. W plugs at contact level are being replaced with Co fill process.

Defect-free filling of sub-15 nm damascene features (trenches and vias), low electrical resistivity and high electromigration resistance are very important for scaling of on-chip interconnects.

Atomic Layer Deposition and Chemical Vapor Deposition

NANO3D SYSTEMS, LLC expand its product portfolio to ALD & CVD metal-organic precursors for deposition of Iridium (Ir), Palladium (Pd), Platinum (Pt), Ruthenium (Ru), Rhodium (Rh), Gold (Au), Silver (Ag), Cobalt (Co), Nickel (Ni) and Copper (Cu) conformal films and nano-layers. The specialty chemicals, metal-organic precursors, are provided in collaboration with NANO3D’s partner.


NANO3D SYSTEMS LLC is in final phase of SBIR Phase II/IIB project founded by National Science Foundation. NANO3D’s eLOCOSTM plating technology has been endorsed by 22 customers including world largest companies in semiconductor, transportation and consumer electronics industries. NANO3D has also recently launched our new website ( in collaboration with and Transene Company Inc. to market and sell products in the following categories:

  1. Electroless Plating Solutions (low resistivity Cu, ohmic contact NiP, conformal NiWP and CoWP barriers,  cyanide-free immersion Au, Immersion Zn and electroless Sn)
  2. Electroplating Solutions (high speed & bright Cu, low stress Ni, low stress & low CTE Invar, low stress Permalloy, low stress NiCo, cyanide-free Au, nano-crystalline Pd)
  3. Electrochemical microfabrication (plateable TiOx-Pd photoresist, Electroless NiP and Cu on Ceramics, Cu plated graphite particles, Ultra-Thin Ni & NiFe alloys Foils)


Plating for Electronics Applications

The focus issues of JECS highlights Advances in Electrochemical Processes for Interconnect Fabrication in Integrated Circuits, Vol. 166, No. 1, 2019. Contribution from leading researches cover fundamental and applied aspects of electrochemical nano- and micro-fabrication including but not limited to:

  1. Superconformal cobalt plating for contacts and local interconnects in 10 nm and beyond technology that improves via resistance and electromigration. 
  2. Superconformal copper plating of through-silicon vias (TSV) and through-glass vias (TGV) interconnects for MEMS devices and glass interposers.
  3. Superconformal gold plating of recessed surface features for compound semiconductors and related optoelectronics to enable dense 3-D interconnects.
  4. Electroplating of copper for damascene interconnects, copper on ruthenium liner for electronics interconnects, gold & nickel for MEMS and FeCo & FeCoMn for magnetic recording.
  5. Electroless copper seed conformal plating for TSV interconnects and FeNiB alloy with low coefficient of thermal expansion for high-density packaging.

Superconformal cobalt and copper plating have been achieved in a single suppressor-type additive plating bath, while superconformal gold plating was demonstrated in an accelerating-type additive chemistry that is a significant departure from the conventional damascene process that uses three additives (accelerator, suppressor and leveler). The bottom-up fill mechanisms are based on pH & suppressor gradient for Co deposition, suppressor reduction for Cu TGV plating, S-shaped Negative Differential Resistance and Curvature Enhanced Accelerator Coverage models for superconformal plating of different metals. These mechanisms were discussed in papers from companies & research institutions including  Atotech, Corning, LAM Research, NIST, ITRI, Sandia National Labs and various universities such as Binghamton University SUNY, National Tsing Hua University et al.